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IRFPS43N50K, SiHFPS43N50K
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 350 85 180 Single
D
FEATURES
500 0.078
* Low Gate Charge Qg Results in Simple Drive Requirement * Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Available
RoHS*
COMPLIANT
* Fully Characterized Capacitance and Avalanche Voltage and Current * Low RDS(on) * Lead (Pb)-free Available
SUPER-247TM
G S D G
APPLICATIONS
* Switch Mode Power Supply (SMPS) * Uninterruptible Power Supply
S N-Channel MOSFET
* High Speed Power Switching * Hard Switched and High Frequency Circuits
ORDERING INFORMATION
Package Lead (Pb)-free SnPb SUPER-247TM IRFPS43N50KPbF SiHFPS43N50K-E3 IRFPS43N50K SiHFPS43N50K
ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise noted
PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya TC = 25 C Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) for 10 s EAS IAR EAR PD dV/dt TJ, Tstg VGS at 10 V TC = 25 C TC = 100 C SYMBOL VDS VGS ID IDM LIMIT 500 30 47 29 190 4.3 910 47 54 540 9.0 - 55 to + 150 300d W/C mJ A mJ W V/ns C A UNIT V
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 C, L = 0.82 mH, RG = 25 , IAS = 47 A (see fig. 12c). c. ISD 47 A, dI/dt 230 A/s, VDD VDS, TJ 150 C. d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91262 S-81367-Rev. B, 21-Jul-08 www.vishay.com 1
IRFPS43N50K, SiHFPS43N50K
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.24 MAX. 40 0.23 C/W UNIT
SPECIFICATIONS TJ = 25 C, unless otherwise noted
PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Body Diode Recovery Current Forward Turn-On Time IS ISM VSD trr Qrr IRRM ton TJ = 25 C, IF = 47 A, dI/dt = 100 A/sb MOSFET symbol showing the integral reverse p - n junction diode
D
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs
VGS = 0 V, ID = 250 A Reference to 25 C, ID = 1 mA VDS = VGS, ID = 250 A VGS = 30 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 C VGS = 10 V ID = 28 Ab VDS = 50 V, ID = 28 A
500 3.0 23
0.60 0.078 -
5.0 100 50 250 0.090 -
V V/C V nA A S
Ciss Coss Crss Coss Coss eff. Qg Qgs Qgd td(on) tr td(off) tf
VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V, f = 1.0 MHz VGS = 0 V VDS = 400 V, f = 1.0 MHz VDS = 0 V to 400 Vc ID = 47 A, VDS = 400 V, see fig. 6 and 13b VGS = 10 V VDD = 250 V, ID = 47 A, RG = 1.0 , see fig. 10b
-
8310 960 120 10170 240 440 25 140 55 74
350 85 180 ns nC pF
-
620 14 38
47 A 190 1.5 940 21 V ns C A
G
S
TJ = 25 C, IS = 47 A, VGS = 0 Vb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 400 s; duty cycle 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.
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Document Number: 91262 S-81367-Rev. B, 21-Jul-08
IRFPS43N50K, SiHFPS43N50K
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted
1000
I D , Drain-to-Source Current (A)
100
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
100
TJ = 150 C
10
10
1
TJ = 25 C
1
0.1
4.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
0.01 0.1
0.1
V DS= 50V 20s PULSE WIDTH 4 5 6 7 8 9 10 11 12
VDS , Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
I D , Drain-to-Source Current (A)
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM4.5V TOP
RDS(on) , Drain-to-Source On Resistance (Normalized)
1000
3.5 3.0 2.5 2.0 1.5 1.0 0.5
ID = 48A
10
4.5V
1
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
TJ , Junction Temperature ( C) Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91262 S-81367-Rev. B, 21-Jul-08
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IRFPS43N50K, SiHFPS43N50K
Vishay Siliconix
1000000
1000
100000
C, Capacitance(pF)
Coss = Cds + Cgd 10000
ISD , Reverse Drain Current (A)
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd
100
TJ = 150 C
10
Ciss
1000
Coss
100
TJ = 25 C
1
Crss
10 1 10 100 1000
0.1 0.2
V GS = 0 V
0.7 1.2 1.7 2.2
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
VSD ,Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20
1000
ID = 48A
VGS , Gate-to-Source Voltage (V)
V DS= 400V V DS= 250V V DS= 100V
OPERATION IN THIS AREA LIMITED BY RDS(on)
15
ID , Drain Current (A)
100
10us
10
100us 10
1ms
5
0 0 50 100 150 200 250 300 350
1
TC = 25 C TJ = 150 C Single Pulse
10 100
10ms
1000
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
VDS , Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
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Document Number: 91262 S-81367-Rev. B, 21-Jul-08
IRFPS43N50K, SiHFPS43N50K
Vishay Siliconix
VDS
RD
50
VGS RG D.U.T. + - VDD 10 V
40
ID , Drain Current (A)
30
Pulse width 1 s Duty factor 0.1 %
Fig. 10a - Switching Time Test Circuit
20
VDS 90 %
10
0
25
50
75
100
125
150
10 % VGS td(on) tr td(off) tf
TC , Case Temperature ( C)
Fig. 9 - Maximum Drain Current vs. Case Temperature
1
Fig. 10b - Switching Time Waveforms
Thermal Response(Z thJC )
0.1
D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
15 V
VDS tp
VDS
L
Driver
RG 20 V tp
D.U.T IAS 0.01
+ A - VDD
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Document Number: 91262 S-81367-Rev. B, 21-Jul-08
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IRFPS43N50K, SiHFPS43N50K
Vishay Siliconix
2000
EAS , Single Pulse Avalanche Energy (mJ)
TOP BOTTOM
ID 22A 30A 47A
1500
1000
500
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator Same type as D.U.T.
50 k
12 V
10 V QGS
QG
0.2 F
0.3 F
QGD D.U.T.
+ -
VDS
VG
VGS
3 mA
Charge
IG ID Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
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Document Number: 91262 S-81367-Rev. B, 21-Jul-08
IRFPS43N50K, SiHFPS43N50K
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T
+
Circuit layout considerations * Low stray inductance * Ground plane * Low leakage inductance current transformer
+ +
-
RG
* * * *
dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test
+ VDD
Driver gate drive P.W. Period D=
P.W. Period VGS = 10 V*
D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt
VDD
Re-applied voltage Inductor current
Body diode forward drop
Ripple 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91262.
Document Number: 91262 S-81367-Rev. B, 21-Jul-08
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, "Vishay"), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
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